2007. 3. 22 1/8 semiconductor technical data KMB7D6NP30Q n and p-ch trench mosfet revision no : 1 general description switching regulator and dc-dc converter applications. it s mainly suitable for power management in pc, portable equipment and battery powered systems. features n-channel : v dss =30v, i d =7.6a. : r ds(on) =20m (max.) @ v gs =10v : r ds(on) =40m (max.) @ v gs =4.5v p-channel : v dss =-30v, i d =-5.3a. : r ds(on) =45m (max.) @ v gs =-10v : r ds(on) =60m (max.) @ v gs =-4.5v super high dense cell design. reliable and rugged. maximum rating (ta=25 ) flp-8 (1) g h p t millimeters b2 g h l d a b1 dim p d l t 1.27 typ. 5.05+0.25/-0.20 3.90 0.3 + _ 0.42 0.1 + _ 0.15 0.1 + _ 6.00 0.4 + _ 1.4 0.2 + _ 0.20 0.05 + _ 0.5 0.2 + _ b2 b1 1 4 5 8 a g1 s1 d1 d1 g2 d2 d2 s2 n-channel mosfet p-channel mosfet * : surface mounted on fr4 board, t 10sec. characteristic symbol n-ch p-ch unit drain-source voltage v dss 30 -30 v gate-source voltage v gss 20 20 v drain current dc i d * 7.6 -5.3 a pulsed (note1) i dp 30 -20 source-drain diode current i s 1.7 -1.7 a drain power dissipation p d * 2 w maximum junction temperature t j 150 storage temperature range t stg -55 150 thermal resistance, junction to ambient r thja 62.5 /w 1 2 3 4 8 7 6 5 s 1 g 1 s 2 g 2 d 1 d 1 d 2 d 2 pin connection (top view)
2007. 3. 22 2/8 KMB7D6NP30Q revision no : 1 electrical characteristics (ta=25 ) characteristic symbol test condition min. typ. max. unit static drain-source breakdown voltage bv dss i d =250 a, v gs =0v, n-ch 30 - - v i d =-250 a, v gs =0v, p-ch -30 - - drain cut-off current i dss v gs =0v, v ds =24v n-ch - - 1 a v gs =0v, v ds =-24v p-ch - - -1 gate leakage current i gss v gs = 20v, v ds =0v n-ch - - 100 na p-ch - - 100 gate threshold voltage v th v ds =v gs, i d =250 a n-ch 1.0 1.7 3 v v ds =v gs, i d =-250 a p-ch -1.0 -1.6 -3 drain-source on resistance r ds(on) v gs =10v, i d =7a (note 1) n-ch - 14 20 m v gs =-10v, i d =-5a (note 1) p-ch - 35 45 v gs =4.5v, i d =6a (note 1) n-ch - 24 40 v gs =-4.5v, i d =-4a (note 1) p-ch - 50 60 on state drain current i d(on) v gs =10v, v ds =10v (note 1) n-ch 20 - - a v gs =-10v, v ds =-5v (note 1) p-ch -20 - - forward transconductance g fs v ds =10v, i d =7a (note 1) n-ch - 10 - s v ds =-5v, i d =-5a (note 1) p-ch - 9 - source-drain diode forward voltage v sd i s =1.7a, v gs =0v (note 1) n-ch - 0.76 1.2 v i s =-1.7a, v gs =0v (note 1) p-ch - -0.74 -1.2
2007. 3. 22 3/8 KMB7D6NP30Q revision no : 1 note 1) pulse test : pulse width 300 , duty cycle 2%. note 2) guaranteed by design. not subject to production testing. characteristic symbol test condition min. typ. max. unit dynamic (note 2) total gate charge q g n-ch : v ds =15v, i d =7a, v gs =10v (fig.1) p-ch : v ds =-15v, i d =-5a, v gs =-10v (fig.3) n-ch - 20.1 - nc p-ch - 13.8 - n-ch : v ds =15v, i d =7a, v gs =4.5v (fig.1) p-ch : v ds =-15v, i d =-5a, v gs =-4.5v (fig.3) n-ch - 10.5 - p-ch - 6.85 - gate-source charge q gs n-ch : v ds =15v, i d =7a, v gs =10v (fig.1) p-ch : v ds =-15v, i d =-5a, v gs =-10v (fig.3) n-ch - 2.64 - p-ch - 1.52 - gate-drain charge q gd n-ch - 6.08 - p-ch - 3.65 - turn-on delay time t d(on) n-ch : v dd =15v, i d =1a, v gs =10v, r g =6 (fig.2) p-ch : v dd =-15v, v gs =-10v, r l =2.7 , r g =3 (fig.4) n-ch - 8.3 - ns p-ch - 5.6 - turn-on rise time t r n-ch - 27.5 - p-ch - 20.5 - turn-off delay time t d(off) n-ch - 20.8 - p-ch - 13.6 - turn-off fall time t f n-ch - 8.3 - p-ch - 7.8 - input capacitance c iss n-ch : v ds =15v, v gs =0v, f=1.0mhz p-ch : v ds =-15v, v gs =0v, f=1.0mhz n-ch - 1014 - pf p-ch - 714 - output capacitance c oss n-ch - 213 - p-ch - 161 - reverse transfer capacitance c rss n-ch - 151 - p-ch - 102 -
2007. 3. 22 4/8 KMB7D6NP30Q revision no : 1 gate - source voltage v gs (v) i d - v ds drain - source voltage v ds (v) drain - source voltage v ds (v) 0 0 1 4 8 12 16 20 23456 5 15 0 10 25 20 1.6 2.4 04.8 0.8 4.0 3.2 i d - v gs i s - v sd drain current i d (a) drain current i d (a) r ds(on) - t j -75 -50 -25 25 50 75 150 125 100 0 reverse drain current i s (a) capacitance (pf) 1 10 40 0.8 1.4 1.2 0.6 1.0 0.4 source - drain voltage v sd (v) normalized threshold voltage v th v th - t j c - v ds -75 -50 -25 0.6 0.8 0.4 1.6 1.0 1.4 1.2 0 0.4 1.4 2.2 0.8 1.8 1.0 050100 25 25 150 125 75 10 15 0 5 20 30 normalized on resistance junction temperature tj ( ) c junction temperature tj ( ) c 0 600 1800 1500 900 1200 300 v gs =3.5v v gs =10, 9, 7, 5, 4.5v v gs =4v v gs =3v v ds = v gs i ds = 250 a v gs = 10v i d = 7a c oss c iss c rss 25 c -55 c 125 c n-channel
2007. 3. 22 5/8 KMB7D6NP30Q revision no : 1 gate - charge q g (nc) 0 10 6 2 4 8 10 10 50 30 1 1 0.1 0.1 0.03 40 6 15 3 12 9 21 18 24 0 q g - v gs gate - source voltage v gs (v) v ds =15v i d = 7a drain current i d (a) drain - source voltage v ds (v) safe operation area dc 100 ms 1s 10 ms operation in this area is limited by r ds(on) t c = 25 t j = 150 single nonrepetitive pulse c c gate - source voltage v gs (v) i d - v ds drain - source voltage v ds (v) 0 0 -1 -4 -8 -12 -16 -20 -2 -3 -4 -5 -6 -5 -15 0 -10 -25 -20 -1.6 -2.4 0-4.8 -0.8 -4.0 -3.2 i d - v gs i s - v sd drain current i d (a) drain current i d (a) reverse drain current i s (a) 1.0 10 40 -0.8 -1.4 -1.2 -0.6 -1.0 -0.4 source - drain voltage v sd (v) normalized threshold voltage v th v th - t j -75 -50 -25 0.6 0.8 0.4 1.6 1.0 1.4 1.2 050100 25 150 125 75 junction temperature tj ( ) c v gs =-3.5v v gs =-4v v gs =-3v v ds = v gs i ds = 250 a 25 c -55 c 125 c p-channel v gs =-10, -9, -8, -7, -6, -5, -4.5v
2007. 3. 22 6/8 KMB7D6NP30Q revision no : 1 drain - source voltage v ds (v) r ds(on) - t j -75 -50 -25 25 50 75 150 125 100 0 capacitance (pf) c - v ds 0 0.4 1.4 2.2 0.8 1.8 1.0 -25 -10 -15 0 -5 -20 -30 normalized on resistance junction temperature tj ( ) c 0 400 1200 1000 600 800 200 v gs = 10v i d = -5a c oss c iss c rss gate - charge q g (nc) 0 -10 -6 -2 -4 -8 -10 -10 -50 -1 -1 -0.1 -0.1 -0.03 -50 6 15 3 12 9 21 18 24 0 q g - v gs gate - source voltage v gs (v) v ds = -15v i d = -5a drain current i d (a) drain - source voltage v ds (v) safe operation area operation in this area is limited by r ds(on) t c = 25 t j = 150 single nonrepetitive pulse c c dc 100 ms 1s 10 ms
2007. 3. 22 7/8 KMB7D6NP30Q revision no : 1 fig.1 gate charge i d i d v ds v gs v gs 1.0 ma 0.5 v dss schottky diode 10 v q g q gd q gs q 6 ? n - channel v ds v ds v gs 0.5 v dss 10v r l t r t d(off) t off t d(on) t on t f 10% 90% fig.2 resistive load switching v gs
2007. 3. 22 8/8 KMB7D6NP30Q revision no : 1 v gs - 4.5 v q g q gd q gs q v ds v gs t r t d(on) 10% 90% t on t f t d(off) t off i d i d v gs v ds v gs 1.0 ma schottky diode - 10 v 6 ? r l 0.5 v dss 0.5 v dss v ds fig.3 gate charge p - channel fig.4 resistive load switching
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